The present invention relates to testing of digital memory circuits and, more particularly, on-chip circuitry for isolating malfunctions in a random access memory (RAM) circuit formed in a monolithic integrated circuit semiconductor chip.
In a monolithic integrated circuit memory chip, the number of memory circuits internal thereto that may be electrically isolated from other such circuits and individually tested is limited by the number of external interconnection pads available on that chip. The number of interconnection pads is limited by the space available on that chip as designed. The tradeoff for the use of an additional interconnection pad for providing access to an internal circuit is the loss of such an interconnection pad for access to another internal circuit. A determination of how to maximize electrical access to the internal circuits in that chip with its limited number of possible pads must be made as part of the design. This often involves providing the interconnection pads with alternative internal circuit connections by switches provided in a multiplexing arrangement such that each pad has multiple alternative internal connections.
If an error arises in the operation of the memory circuit, the limited number of interconnection pads available to provide access to internal memory circuits often makes impossible the precise isolation of the circuit which is malfunctioning. One example of a testing procedure used for testing monolithic integrated circuit chips with RAM circuits is done by simply writing data into every memory location therein and then reading this data out. If the data read-out is not the same as was written, the RAM circuit is determined to be malfunctioning. Without further investigation (possibly requiring an electron microscope), the malfunction location or circuit cannot be determined as it may have occurred in any of the memory cells, the decoders, or the input/output (IO) circuitry.
Achieving improvements in quality in such RAM circuit chips, malfunctions must be isolated to a particular certain circuit or component therein. Then the cause may be determined. Hence, the RAM circuit chip may be redesigned with those improvements to avoid further such malfunctions.
A desirable RAM circuit chip would permit testing certain circuits or circuit groups separately so that any particular faulty circuit therein can be found.